Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs

Name: Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs
Brand: Springer International Publishing AG
SKU: 9783319023779
Price: 103.14 EUR
Availability: InStock

Автор: Brandon Noia, Krishnendu Chakrabarty

Език:

Корици: С твърди корици

Издател: Springer International Publishing AG

Наличност: Външен склад

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103.14 € 201.73 лв

This book describes innovative techniques to address the testing needs of 3D stacked integrated circ...

Информация за книгата

Автор

Brandon Noia, Krishnendu Chakrabarty

Език

Английски език

Корици

Книга - С твърди корици

Издадена

2013

страници

245

EAN

9783319023779

ISBN

3319023772

Enbook ID

02076816

Издател

Springer International Publishing AG

Теглоt

514

Размери

157 x 243 x 16

Пълно описание

This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain. Coverage includes topics ranging from die-level wrappers, self-test circuits, and TSV probing to test-architecture design, test scheduling, and optimization. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 3D ICs a reality and commercially viable.

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Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs

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